Electronics Resurgence Initiative: Page 3 Investments Design Thrust

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Funding Opportunity ID: 297340
Opportunity Number: HR001117S0054
Opportunity Title: Electronics Resurgence Initiative: Page 3 Investments Design Thrust
Opportunity Category: Discretionary
Opportunity Category Explanation:
Funding Instrument Type: Cooperative Agreement
Grant
Other
Procurement Contract
Category of Funding Activity: Science and Technology and other Research and Development
Category Explanation:
CFDA Number(s): 12.910
Eligible Applicants: Unrestricted (i.e., open to any type of entity above), subject to any clarification in text field entitled “Additional Information on Eligibility”
Additional Information on Eligibility:
Agency Code: DOD-DARPA-MTO
Agency Name: Department of Defense
DARPA – Microsystems Technology Office
Posted Date: Sep 13, 2017
Close Date: The full proposal must be submitted via the DARPA BAA website on or before 1:00 PM, Eastern Time, November 14, 2017. If deemed compliant, the Government will evaluate all such proposals in the initial round of selections. Additionally, proposals may be submitted after the above due date until 1:00 PM, Eastern Time, January 31, 2018 which, if deemed compliant, will be reviewed at the Government’s discretion, depending upon the availability of funding. Proposers are warned that the likelihood of available funding is greatly reduced for proposals submitted after the initial closing date deadline.
Last Updated Date: Sep 13, 2017
Award Ceiling:
Award Floor:
Estimated Total Program Funding:
Expected Number of Awards:
Description: DARPA is soliciting innovative research proposals in the area of physical design of electronic circuits and systems. Proposed research should investigate innovative approaches that enable revolutionary advances in science, devices, or systems. The Design thrust of the Electronics Resurgence Initiative (ERI): Page 3 Investments will address today’s System-On-Chip (SoC) design complexity and cost barriers, creating the environment needed for the next wave of US semiconductor innovation. Programs within this thrust will develop the algorithms and software required to realize a unified layout generator that will enable fully automated “no human in the loop” physical design of SoCs, system-in-packages (SiPs), and printed circuit boards (PCBs) in 24 hours. In parallel, programs will create the building blocks, validation methodologies, and infrastructure required for a scalable open source hardware ecosystem, bringing best practices in software to hardware design.
Version: Synopsis 1





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